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tel: 886-2-66296288 fax: 886-2-29174598 url: http://www.princeton.com.tw pt6315-s v1.9 - 1 - september, 2005 vfd driver/controller ic pt6315-s description pt6315-s is a vacuum fluorescent display (vfd) cont roller driven on a 1/4 to 1/8 duty factor. eight segment output lines, 4 grid output lines, 4 segm ent/grid output drive lines, one display memory, control circuit, key scan circuit are all incorporated in to a single chip to build a highly reliable peripheral device for a single chip micro computer. serial data is fed to pt6315-s via a three-line serial interface. it is housed in a 28pins, sop. features ? cmos technology ? low power consumption ? key scanning (8 x 2 matrix) ? multiple display modes: (8 segments, 8 digits to 12 segments, 4 digits) ? 8-step dimming circuitry ? serial interface for clock, data input, data output, strobe pins ? no external resistors needed for driver outputs ? available in 28pins, sop application ? microcomputer peripheral devices
tel: 886-2-66296288 fax: 886-2-29174598 url: http://www.princeton.com.tw pt6315-s v1.9 - 2 - september, 2005 vfd driver/controller ic pt6315-s block diagram sg1/ks1 sg2/ks2 sg3/ks3 sg4/ks4 sg5/ks5 sg6/ks6 sg7/ks7 sg8/ks8 sg9/gr8 sg10/gr7 sg11/gr6 gr1 gr2 gr3 gr4 vee g nd vdd k2 k1 osc r din dout clk stb serial data interface control display memory timing generator key matrix memory segment driver/ grid driver/ key scan output grid driver dimming circuit osc sg12/gr 5
tel: 886-2-66296288 fax: 886-2-29174598 url: http://www.princeton.com.tw pt6315-s v1.9 - 3 - september, 2005 vfd driver/controller ic pt6315-s pin configuration vee 1 3 2 5 4 8 7 6 10 9 12 11 pt6315-s 28 26 27 24 25 21 22 23 19 20 17 18 14 13 15 16 clk stb k1 k2 vss vdd sg1/ks1 sg2/ks2 sg3/ks3 sg4/ks4 sg5/ks5 sg6/ks6 sg7/ks7 sg8/ks8 sg9/gr8 sg10/gr7 din dout osc vss vdd gr1 gr2 gr3 gr4 sg12/gr5 sg11/gr6
tel: 886-2-66296288 fax: 886-2-29174598 url: http://www.princeton.com.tw pt6315-s v1.9 - 4 - september, 2005 vfd driver/controller ic pt6315-s pin description pin name i/o description pin no. clk i clock input pin this pin reads serial data at the rising edge and outputs data at the falling edge. 1 stb i serial interface strobe pin the data input after the stb has fallen is processed as a command. when this pin is ?high?, clk is ignored. 2 k1 to k2 i key data input pins the data sent to these pins are latched at the end of the display cycle. 3, 4 vss - logic ground pin 5, 25 vdd - logic power supply 6, 24 sg1/ks1 to sg8/ks8 o high voltage segment output pi ns also acts as the key source 7 to 14 vee - pull down level 15 sg9/gr8 to sg12/gr5 o high voltage s egment/grid output pins 16 to 19 gr4 to gr1 o high voltage grid output pins 20 to 23 osc i oscillator input pin a resistor is connected to this pin to determine the oscillation frequency. 26 dout o data output pin (n-channel, open drain) this pin outputs serial data at the falling edge of the shift clock (starting from the lower bit). 27 din i data input pin this pin inputs serial data at the rising edge of the shift clock (starting from the lower bits). 28
tel: 886-2-66296288 fax: 886-2-29174598 url: http://www.princeton.com.tw pt6315-s v1.9 - 5 - september, 2005 vfd driver/controller ic pt6315-s function description commands commands determine the display mode and status of pt6315-s. a command is the first byte (b0 to b7) inputted to pt6315-s via the din pin after stb pin has changed from ?high? to ?low? state. if for some reason the stb pin is set to ?high? while data or commands are being transmitted, the serial communication is initialized, and the data/comm ands being transmitted are considered invalid. command 1: display mode setting commands pt6315-s provides 4 display mode settings as show n in the diagram below: as stated earlier a command is the first one byte (b0 to b7) transmitt ed to pt6315-s via the din pin when stb is ?low?. however, for these commands, the bits 5 to 6 (b4 to b5) are ignored, bits 7 & 8 (b6 to b7) are given a value of ?0?. the display mode setting commands determine the num ber of segments and grid s to be used (1/4 to 1/8 duty, 12 to 8 segments). when t hese commands are executed, the display is forcibly turned off, the key scanning stops. a display ?on? command must be exec uted in order to resume display. if the same mode setting is selected, no command execution is take place, therefore, nothing happens. when power is turned ?on?, the 8-di git, 8-segment mode is selected. msb lsb 0 0 - - b3 b2 b1 b0 not relevant display mode settings: 0000: 4 digits, 12 segments 0011: 5 digits, 11 segments 0100: 6 digits, 10 segments 0101: 7 digits, 9 segments 0110: 8 digits, 8 segments
tel: 886-2-66296288 fax: 886-2-29174598 url: http://www.princeton.com.tw pt6315-s v1.9 - 6 - september, 2005 vfd driver/controller ic pt6315-s display mode and ram address data transmitted from an external device to pt6315-s via the serial interface are stored in the display ram and are assigned addresses. the ram addresses of pt6315-s are given below in 8 bits unit. sg1 sg4 sg5 sg8 sg9 sg12 00h 01h 02h dgt1 03h 04h 05h dgt2 06h 07h 08h dgt3 09h 0ah 0bh dgt4 12h 13h 14h dgt5 15h 16h 17h dgt6 18h 19h 1ah dgt7 1bh 1ch 1dh dgt8 b0 b7 sg1 sg2 sg3 sg4 x x x x b0 b7 sg5 sg6 sg7 sg8 x x x x b0 b7 x x sg9 sg10 sg11 sg12 x x notes: x=ignore this byte
tel: 886-2-66296288 fax: 886-2-29174598 url: http://www.princeton.com.tw pt6315-s v1.9 - 7 - september, 2005 vfd driver/controller ic pt6315-s command 2: data setting commands the data setting commands executes the data wr ite or data read modes for pt6315-s. the data setting command, the bits 5 and 6 (b4, b5) are ignored, bit 7 (b6) is given the value of ?1? while bit 8 (b7) is given the value of ?0?. please refer to the diagram below. when power is turned on, the bit 4 to bit 1 (b3 to b0) are given the value of ?0?. msb lsb 0 1 - - b3 b2 b1 b0 not relevant data write & read mode settings: 00: write data to display mode 01: read key data 10: read key data 11: irrelevant address increment mode settings (display mode): 0: increment address after data has been written 1: fixed address mode settings: 0: normal operation mode 1: test mode
tel: 886-2-66296288 fax: 886-2-29174598 url: http://www.princeton.com.tw pt6315-s v1.9 - 8 - september, 2005 vfd driver/controller ic pt6315-s pt6315-s key matrix & key input data storage ram pt6315-s key matrix consists of an 8 x 12 array as shown below: k1 k2 sg1/ks1 sg2/ks2 sg3/ks3 sg4/ks4 sg5/ks5 sg6/ks6 sg7/ks7 sg8/ks8 each data entered by each key is st ored as follows. they are read by a read command, starting from the last significant bit. when the most significant bit of the data (sg8, b7) has been read, the least significant bit of the next data (sg0, b1) is read. k1????k1 k1????k2 k1????k2 k1?????k2 sg1/ks1 sg2/ks2 sg3/ks3 sg4/ks4 * * * * sg5/ks5 sg6/ks6 sg7/ks7 sg8/ks8 b0????.b1 b2????.b3 b4????.b5 b6?????.b7 reading sequence note: * = these sections are not relevant but are needed to read the transmission clock.
tel: 886-2-66296288 fax: 886-2-29174598 url: http://www.princeton.com.tw pt6315-s v1.9 - 9 - september, 2005 vfd driver/controller ic pt6315-s command 3: address setting commands address setting commands are used to set the address of the display memory. the address is considered valid if it has a value of ?00h? to ?1dh? . if the address is set to 1eh or higher, the data is ignored until a valid address is set. when power is turned on, the address is set at ?00h?. please refer to the diagram below. msb lsb 1 1 0 b4 b3 b2 b1 b0 address: 00h to 1dh command 4: display control commands the display control commands are used to turn on or off a display. it also used to set the pulse width. please refer to the diagram below. when the power is turned on, a 1/16 pulse width is selected and the displayed is turned off (the key scanning is stopped). msb lsb 1 0 - - b3 b2 b1 b0 not relevant dimming quantity settings: 000: pulse width = 1/16 001: pulse width = 2/16 010: pulse width = 4/16 011: pulse width = 10/16 100: pulse width ? 11/16 101: pulse width = 12/16 110: pulse width = 13/16 111: pulse width = 14/16 display settings: 0: display off (key scan continues) 1: display on
tel: 886-2-66296288 fax: 886-2-29174598 url: http://www.princeton.com.tw pt6315-s v1.9 - 10 - september, 2005 vfd driver/controller ic pt6315-s scanning and display timing the key scanning and display timing diagram is giv en below. one cycle of key scanning consists of 2 frames. the data of the 8 x 2 ma trix is stored in the ram. internal operating frequency (fosc) = 224/t t=500s display
tel: 886-2-66296288 fax: 886-2-29174598 url: http://www.princeton.com.tw pt6315-s v1.9 - 11 - september, 2005 vfd driver/controller ic pt6315-s serial communication format the following diagram shows the pt6315-s serial communication format. the dout pin is an n-channel, open-drain output pin, ther efore, it is highly recommended t hat an external pull-up resistor (1k ? to 10k ? ) must be connected to dout. reception (data/command write) stb din clk if data continues b0 b1 b2 b6 b7 12 378 transmission (data read) stb din clk dout b0 b1 b2 b3 b4 b5 b6 b7 12 34 5 678 12 3 4 5 6 b0 b1 b2 b3 b4 b5 data read com m and is set data reading starts t wait where: twait (waiting time) 1s it must be noted that when the data is read, the waiting time (twait ) between the rising of the eighth clock that has set the command and the falling of the first clock that has read the data is greater or equal to 1s.
tel: 886-2-66296288 fax: 886-2-29174598 url: http://www.princeton.com.tw pt6315-s v1.9 - 12 - september, 2005 vfd driver/controller ic pt6315-s switching characteristic waveform pt6315-s switching characteristics waveform is given below. osc stb clk din gn 90% 10% fosc 50% pw clk pw clk t setup t ho ld pw st b t cl k- st b t tzh2 t thz sn 90% 10% t thz t tzh1 dout t pzl t plz where: pw clk (clock pulse width) 400ns pw stb (strobe pulse width) 1us tsetup (data setup time) 100ns thold (data hold time) 100ns tclk-stb (clock - strobe time) 1us tthz (fall time) 150us ttzh2 (grid rise time) 0.5us (at vdd=5v) tpzl (propagation delay time) 100ns ttzh2 (grid rise time) 1.0us (at vdd=3.3v) tplz (propagation delaytime) 400ns ttzh1 (segment rise time) 2.0us (at vdd=5v) fosc = oscillation frequency ttzh1 (segment rise time) 3.0us (at vdd=3.3v)
tel: 886-2-66296288 fax: 886-2-29174598 url: http://www.princeton.com.tw pt6315-s v1.9 - 13 - september, 2005 vfd driver/controller ic pt6315-s applications display memory is updated by incrementing addre sses. please refer to the following diagram. stb clk din command 2 command 3 data 1 data n command 1 command 4 where: command 1: display mode setting command command 2: data setting command command 3: address setting command data 1 to n: transfer display data (24 bytes max.) command 4: display control command the following diagram shows the wavefo rms when updating specific addresses. stb clk din command 2 command 3 data command 3 data where: command 2: data setting command command 3: address setting command data: display data
tel: 886-2-66296288 fax: 886-2-29174598 url: http://www.princeton.com.tw pt6315-s v1.9 - 14 - september, 2005 vfd driver/controller ic pt6315-s recommended software flowchart start set command 2 (write data) set command 2 (read key & write data included) set command 3 end initial setting main loop set command 3 clear display ram (see note 5) set command 1 main program set command 4 set command 4 (88h~8fh: display on) delay 200 ms set command 1 notes: 1. command 1: display mode commands 2. command 2: data setting commands 3. command 3: address setting commands 4. command 4: display control commands 5. when ic power is applied for the first time, the c ontents of the display ram ar e not defined; thus, it is strongly suggested that the contents of the display ram be cleared during the initial setting.
tel: 886-2-66296288 fax: 886-2-29174598 url: http://www.princeton.com.tw pt6315-s v1.9 - 15 - september, 2005 vfd driver/controller ic pt6315-s absolute maximum ratings (unless otherwise stated, ta=25 , gnd=0v) parameter symbol ratings unit logic supply voltage vdd -0.5 to +7 v driver supply voltage vee vdd +0.5 to vdd -40 v logic input voltage vi -0.5 to vdd +0.5 v vfd driver output voltage vo vee -0.5 to vdd +0.5 v vfd driver output current iovfd -40 (grid) -15 (segment) ma operating temperatur e topr -40 to +85 storage temperature tstg -65 to +150 recommended operating range (unless otherwise stated, ta=-25 , gnd=0v) ratings parameter symbol min. typ. max. unit logic supply voltage vdd 3.0 5 5.5 v high-level input voltage vih 0.7vdd - vdd v low-level input voltage vil 0 - 0.3vdd v driver supply voltage vee vdd -35 - 0 v
tel: 886-2-66296288 fax: 886-2-29174598 url: http://www.princeton.com.tw pt6315-s v1.9 - 16 - september, 2005 vfd driver/controller ic pt6315-s electrical characteristics (unless otherwise stated, v dd=5v, gnd=0v, vee=vdd-35v, ta=25 ) parameter symbol test condition min. typ. max. unit low-level output voltage voldout dout, ioldout=4ma - - 0.4 v high-level output current iohsg vo=vdd -2v sg1/ks1 to sg8/ks8 -3 - - ma high-level output current iohgr vo=vdd -2v gr1 to gr4, sg9/gr8 to sg12/gr5 -15 - - ma high-level input voltage vih - 0.7vdd - - v low-level input voltage vil - - - 0.3vdd v oscillation frequency fosc r=100k ? 350 500 650 khz input current ii vi=vdd or vss - - 1 a dynamic current consumption idddyn under no load display off - - 5 ma (unless otherwise stated, vdd= 3.3v, gnd=0v, vee=vdd-35v, ta=25 ) parameter symbol test condition min. typ. max. unit low-level output voltage voldout dout, ioldout=4ma - - 0.4 v high-level output current iohsg vo=vdd -2v sg1/ks1 to sg8/ks8 -1.5 - - ma high-level output current iohgr vo=vdd -2v gr1 to gr4, sg9/gr8 to sg12/gr5 -6 - - ma high-level input voltage vih - 0.7vdd - vdd v low-level input voltage vil - vss - 0.3vdd v oscillation frequency fosc r=100k ? 350 500 650 khz input current ii vi=vdd or vss - - 1 a dynamic current consumption idddyn under no load display off - - 3 ma
tel: 886-2-66296288 fax: 886-2-29174598 url: http://www.princeton.com.tw pt6315-s v1.9 - 17 - september, 2005 vfd driver/controller ic pt6315-s application circuit din dout osc vss vdd gr1 gr2 gr3 gr4 sg12/gr5 sg11/gr6 sg10/gr7 sg9/gr8 vee clk stb k1 k2 vss vdd sg1/ks1 sg2/ks2 sg3/ks3 sg4/ks4 sg5/ks5 sg6/ks6 sg7/ks7 sg8/ks8 mcu vdd 10k 10k 1n4148 x 8 g8 g7 g6 g5 g 4 g3 g2 g1 s8 s7 s6 s5 s 4 s3 s2 s1 vee 10 0k 10k vdd 8-grid x 8-segment vfd vdd 0.1 f 10 k 10 k
tel: 886-2-66296288 fax: 886-2-29174598 url: http://www.princeton.com.tw pt6315-s v1.9 - 18 - september, 2005 vfd driver/controller ic pt6315-s order information order part number package type top code pt6315-s 28 pins, sop, 300mil pt6315-s pt6315-s (l) 28 pins, sop, 300mil pt6315-s notes: 1. (l), (c) or (s) = lead free. 2. the lead free mark is put in front of the date code.
tel: 886-2-66296288 fax: 886-2-29174598 url: http://www.princeton.com.tw pt6315-s v1.9 - 19 - september, 2005 vfd driver/controller ic pt6315-s package information 28 pins, sop, 300 mil
tel: 886-2-66296288 fax: 886-2-29174598 url: http://www.princeton.com.tw pt6315-s v1.9 - 20 - september, 2005 vfd driver/controller ic pt6315-s symbol min. nom. max. a 2.35 2.65 a1 0.10 0.30 b 0.33 0.51 c 0.23 0.32 d 17.70 18.10 e 7.40 7.60 e 1.27 bsc. h 10.00 10.65 h 0.25 0.75 l 0.40 1.27 a 0 8 notes: 1. dimensioning and toleranc ing per ansi y14.5-1982. 2. dimension ?d? does not include mold flash , protrusions or gate burrs. mold flash, protrusion or gate burrs shall not exceed 0.15mm (0.006 in) per side. 3. dimension ?e? does not include interlead flash or pr otrusions. interlead flash or protrusions shall not exceed 0.25 mm (0.010 in) per side. 4. the chamfer on the body is optional. it is not presen t, a visual index feature must be located within the crosshatched area. 5. ?l? is the length of the termi nal for soldering to a substrate. 6. ?n? is the number of terminal positions. (n=28) 7. the lead width ?b? as measured 0.36 mm (0.014 in ) or greater above the seating plane, shall not exceed a maximum value of 0.61 mm (0.24 in). 8. controlling dimension: millimeter. 9. refer to jedec ms-013 variation ae jedec is the trademark of the jede c solid state technology association

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